Vol 2 , Issue 4 , October - December 2014 | Pages: 30-32 | Research Paper
Received: October 20, 2014 | Revised: November 10, 2014 | Accepted: November 20, 2014 | Published Online: December 15, 2014
Author Details
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There are two primary device structures that have being widely used. One is the bulk structure, where a transistor is directly fabricated on the semiconductor substrate. The other one is called SOI (silicon-on-insulator), where a transistor is built on a thin silicon layer, which is separated from the substrate by a layer of insulator or device scaling; it is basically try to balance two things: device functionality and device reliability. Both of them have to be maintained at a smaller dimensional size [1]. In this paper, three transistors are proposed having different channel lengths 8 micron, 16 micron and 24 micron. Simulation shows that with a fixed gate length, when channel length is increased, the output characteristics slope is decreased.
Keywords
Channel Length; Threshold Voltage; Drain Current